UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 157 of 1269NXP Semiconductors UM10503Chapter 13: LPC43xx Reset Generation Unit (RGU)RESET_EXT_STAT7 - 0x41C Reserved - -RESET_EXT_STAT8 R/W 0x420 Reset external status register 8 forBUS_RST0x0 see Table 127RESET_EXT_STAT9 R/W 0x424 Reset external status register 9 forSCU_RST0x0 see Table 127RESET_EXT_STAT10 - 0x428 Reserved - -RESET_EXT_STAT11 - 0x42C Reserved - -RESET_EXT_STAT12 - 0x430 Reserved - -RESET_EXT_STAT13 R/W 0x434 Reset external status register 13 forM4_RST0x0 see Table 128RESET_EXT_STAT14 - 0x438 Reserved - -RESET_EXT_STAT15 - 0x43C Reserved - -RESET_EXT_STAT16 R/W 0x440 Reset external status register 16 forLCD_RST0x0 see Table 128RESET_EXT_STAT17 R/W 0x444 Reset external status register 17 forUSB0_RST0x0 see Table 128RESET_EXT_STAT18 R/W 0x448 Reset external status register 18 forUSB1_RST0x0 see Table 128RESET_EXT_STAT19 R/W 0x44C Reset external status register 19 forDMA_RST0x0 see Table 128RESET_EXT_STAT20 R/W 0x450 Reset external status register 20 forSDIO_RST0x0 see Table 128RESET_EXT_STAT21 R/W 0x454 Reset external status register 21 forEMC_RST0x0 see Table 128RESET_EXT_STAT22 R/W 0x458 Reset external status register 22 forETHERNET_RST0x0 see Table 128RESET_EXT_STAT23 - 0x45C Reserved - -RESET_EXT_STAT24 - 0x460 Reserved - -RESET_EXT_STAT25 R/W 0x464 Reset external status register 25 forFLASHA_RST0x0 see Table 127RESET_EXT_STAT26 - 0x468 Reserved - -RESET_EXT_STAT27 R/W 0x46C Reset external status register 27 forEEPROM_RST0x0 see Table 127RESET_EXT_STAT28 R/W 0x470 Reset external status register 28 forGPIO_RST0x0 see Table 127RESET_EXT_STAT29 R/W 0x474 Reset external status register 29 forFLASHB_RST0x0 see Table 127RESET_EXT_STAT30 - 0x478 Reserved - -RESET_EXT_STAT31 - 0x47C Reserved - -RESET_EXT_STAT32 R/W 0x480 Reset external status register 32 forTIMER0_RST0x0 see Table 127RESET_EXT_STAT33 R/W 0x484 Reset external status register 33 forTIMER1_RST0x0 see Table 127RESET_EXT_STAT34 R/W 0x488 Reset external status register 34 forTIMER2_RST0x0 see Table 127Table 113. Register overview: RGU (base address: 0x4005 3000) …continuedName Access AddressoffsetDescription Reset value Reference