NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 315 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 315 of 1269NXP Semiconductors UM10503Chapter 16: LPC43xx Global Input Multiplexer Array (GIMA)16.4.9 Timer 2 CAP2_0 capture input multiplexer (CAP2_0_IN)16.4.10 Timer 2 CAP2_1 capture input multiplexer (CAP2_1_IN)7:4 SELECT Select input. Values 0x3 to 0xF are reserved. 00x0 CTOUT_3 or T0_MAT30x1 T1_CAP30x2 T0_MAT331:8 - Reserved -Table 157. Timer 1 CAP1_3 capture input multiplexer (CAP1_3_IN, address 0x400C 701C) bitdescriptionBit Symbol Value Description ResetvalueTable 158. Timer 2 CAP2_0 capture input multiplexer (CAP2_0_IN, address 0x400C 7020) bitdescriptionBit Symbol Value Description Resetvalue0 INV Invert input 00 Not inverted.1 Input inverted.1 EDGE Enable rising edge detection 00 No edge detection.1 Rising edge detection enabled.2 SYNCH Enable synchronization 00 Disable synchronization.1 Enable synchronization.3 PULSE Enable single pulse generation. 00 Disable single pulse generation.1 Enable single pulse generation.7:4 SELECT Select input. Values 0x4 to 0xF are reserved. 00x0 CTIN_00x1 SGPIO12_DIV0x2 T2_CAP031:8 - Reserved -Table 159. Timer 2 CAP2_1 capture input multiplexer (CAP2_1_IN, address 0x400C 7024) bitdescriptionBit Symbol Value Description Resetvalue0 INV Invert input 00 Not inverted.1 Input inverted.1 EDGE Enable rising edge detection 00 No edge detection.1 Rising edge detection enabled.