NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 1113 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1113 of 1269NXP Semiconductors UM10503Chapter 43: LPC43xx I2C-bus interface[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.43.7.1 I2C Control Set registerThe CONSET registers control setting of bits in the CON register that controls operation ofthe I 2C interface. Writing a one to a bit of this register causes the corresponding bit in theI2C control register to be set. Writing a zero has no effect.I2EN I2 C Interface Enable. When I2EN is 1, the I2 C interface is enabled. I2EN can becleared by writing 1 to the I2ENC bit in the CONCLR register. When I2EN is 0, the I 2 Cinterface is disabled.When I2EN is “0”, the SDA and SCL input signals are ignored, the I 2C block is in the “notaddressed” slave state, and the STO bit is forced to “0”.I2EN should not be used to temporarily release the I2 C-bus since, when I2EN is reset, theI2C-bus status is lost. The AA flag should be used instead.STA is the START flag. Setting this bit causes the I2 C interface to enter master mode andtransmit a START condition or transmit a Repeated START condition if it is already inmaster mode.MASK1 R/W 0x034 I2C Slave address mask register 1. This mask register isassociated with ADR1 to determine an address match. Themask register has no effect when comparing to the General Calladdress (‘0000000’).0x00 Table 993MASK2 R/W 0x038 I2C Slave address mask register 2. This mask register isassociated with ADR2 to determine an address match. Themask register has no effect when comparing to the General Calladdress (‘0000000’).0x00 Table 993MASK3 R/W 0x03C I2C Slave address mask register 3. This mask register isassociated with ADR3 to determine an address match. Themask register has no effect when comparing to the General Calladdress (‘0000000’).0x00 Table 993Table 981. Register overview: I2 C1 (base address 0x400E 0000) …continuedName Access AddressoffsetDescription Resetvalue[1]ReferenceTable 982. I2 C Control Set register (CONSET - address 0x400A 1000 (I2C0) and 0x400E 0000(I2C1)) bit descriptionBit Symbol Description Resetvalue1:0 - Reserved. User software should not write ones to reserved bits.The value read from a reserved bit is not defined.-2 AA Assert acknowledge flag.3 SI I 2C interrupt flag. 04 STO STOP flag. 05 STA START flag. 06 I2EN I 2C interface enable. 031:7 - Reserved. The value read from a reserved bit is not defined. -