NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 359 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 359 of 1269NXP Semiconductors UM10503Chapter 18: LPC43xx Serial GPIO (SGPIO)18.6.5 Slice data shadow registers (REG_SS0 to 15)Each slice data shadow register contains the data for one slice: REG_SS0 to REG_SS15contain data for slice A (register 0) to slice P (register 15).This register controls when the shadow register REG_SS content is exchanged with themain register REG. The exchange occurs when the POS counter reaches 0x0.18.6.6 Reload registers (PRESET0 to 15)Each register contains the reload value for one slice: PRESET0 to PRESET15 contain thereload value for slice A (register 0) to slice P (register 15).This register controls the internally generated slice shift clock frequency:frequency(shift_clock) = frequency(SGPIO_CLK) / (PRESET+1).18.6.7 Down counter registers (COUNT0 to 15)This status register reflect the slice shift clock counter value. If the counter has to startwith a defined phase then COUNT should be set to the desired value before the counter isenabled using CTRL_ENABLE.Table 218. Slice data registers (REG0 to 15, addresses 0x4010 10C0 to 0x4010 10FC) bitdescriptionBit Symbol Description ResetvalueAccess31:0 REG At each active shift clock the register shifts right;loading REG(31) with data captured from DIN(n) andDOUT(n) is set to REG(0).0 R/WTable 219. Slice data shadow registers (REG_SS0 to 15, addresses 0x4010 110 to 0x4010113C) bit descriptionBit Symbol Description ResetvalueAccess31:0 REG_SS Each time POS reaches 0x0 the contents of REG_SSis exchanged with the content of REG.0 R/WTable 220. Reload registers (PRESET0 to 15, addresses 0x4010 1140 to 0x4010 117C) bitdescriptionBit Symbol Description ResetvalueAccess11:0 PRESET Counter reload value; loaded when COUNT reaches0x0.0 R/W31:12 - Reserved. - -Table 221. Down counter registers (COUNT0 to 15, addresses 0x4010 1180 to 0x4010 11BC)bit descriptionBit Symbol Description ResetvalueAccess11:0 COUNT Down counter, counts down each shift clock cycle. Nextcount after 0x0 is PRESET.0 R/W31:12 - Reserved. - -