UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 472 of 1269NXP Semiconductors UM10503Chapter 21: LPC43xx External Memory Controller (EMC)DYNAMICRASCAS3 R/W 0x164 Selects the RAS and CAS latencies fordynamic memory chip select 3.0x303 0x303 Table 374- - 0x168 -0x1FCReserved. - - -STATICCONFIG0 R/W 0x200 Selects the memory configuration forstatic chip select 0.0 0x81 Table 375STATICWAITWEN0 R/W 0x204 Selects the delay from chip select 0 towrite enable.0 0 Table 376STATICWAITOEN0 R/W 0x208 Selects the delay from chip select 0 oraddress change, whichever is later, tooutput enable.0 0 Table 377STATICWAITRD0 R/W 0x20C Selects the delay from chip select 0 to aread access.0x1F [2] 0xE Table 378STATICWAITPAGE0 R/W 0x210 Selects the delay for asynchronous pagemode sequential accesses for chipselect 0.0x1F 0x1F Table 379STATICWAITWR0 R/W 0x214 Selects the delay from chip select 0 to awrite access.0x1F 0x1F Table 380STATICWAITTURN0 R/W 0x218 Selects the number of bus turnaroundcycles for chip select 0.0xF 0xF Table 381- - 0x21C Reserved. - - -STATICCONFIG1 R/W 0x220 Selects the memory configuration forstatic chip select 1.0 0 Table 375STATICWAITWEN1 R/W 0x224 Selects the delay from chip select 1 towrite enable.0 0 Table 376STATICWAITOEN1 R/W 0x228 Selects the delay from chip select 1 oraddress change, whichever is later, tooutput enable.0 0 Table 377STATICWAITRD1 R/W 0x22C Selects the delay from chip select 1 to aread access.0x1F 0x1F Table 378STATICWAITPAGE1 R/W 0x230 Selects the delay for asynchronous pagemode sequential accesses for chipselect 1.0x1F 0x1F Table 379STATICWAITWR1 R/W 0x234 Selects the delay from chip select 1 to awrite access.0x1F 0x1F Table 380STATICWAITTURN1 R/W 0x238 Selects the number of bus turnaroundcycles for chip select 1.0xF 0xF Table 381- - 0x23C Reserved. - - -STATICCONFIG2 R/W 0x240 Selects the memory configuration forstatic chip select 2.0 0 Table 375STATICWAITWEN2 R/W 0x244 Selects the delay from chip select 2 towrite enable.0 0 Table 376Table 353. Register overview: External memory controller (base address 0x4000 5000) …continuedName Access AddressoffsetDescription ResetvalueResetvalueafterEMCbootReference