UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1076 of 1269NXP Semiconductors UM10503Chapter 42: LPC43xx C_CAN42.6.2.3 CAN message interface command mask registersThe control bits of the IFx Command Mask Register specify the transfer direction andselect which of the IFx Message Buffer Registers are source or target of the datatransfer.The functions of the register bits depend on the transfer direction (read or write)which is selected in the WR/RD bit (bit 7) of this Command mask register.Select the WR/RD toone for the Write transfer direction (write to message RAM)zero for the Read transfer direction (read from message RAM)Transfer direction WriteTable 944. CAN message interface command mask registers write direction(IF1_CMDMSK_W, address 0x400E 2024 (C_CAN0) and 0x400A 4024 (C_CAN1))bit descriptionBit Symbol Value Description ResetvalueAccess0 DATA_B Access data bytes 4-7 0 R/W0 Data bytes 4-7 unchanged.1 Transfer data bytes 4-7 to message object.1 DATA_A Access data bytes 0-3 0 R/W0 Data bytes 0-3 unchanged.1 Transfer data bytes 0-3 to message object.2 TXRQST Access transmission request bit 0 R/W0 No transmission request. TXRQSRT bitunchanged in IF1/2_MCTRL.Remark: If a transmission is requested byprogramming this bit, the TXRQST bit in theCANIFn_MCTRL register is ignored.1 Request a transmission. Set the TXRQST bitIF1/2_MCTRL.3 CLRINTPND - This bit is ignored in the write direction. 0 R/W4 CTRL Access control bits 0 R/W0 Control bits unchanged.1 Transfer control bits to message object5 ARB Access arbitration bits 0 R/W0 Arbitration bits unchanged.1 Transfer Identifier, DIR, XTD, and MSGVALbits to message object.