UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 884 of 1269NXP Semiconductors UM10503Chapter 30: LPC43xx Motor Control PWM (MOTOCONPWM)Table 718. MCPWM Interrupt flags read address (INTF - 0x400A 0068) bit descriptionBit Symbol Value Description Resetvalue0 ILIM0_F Limit interrupt flag for channel 0. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.1 IMAT0_F Match interrupt flag for channel 0. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.2 ICAP0_F Capture interrupt flag for channel 0. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.3 - Reserved. -4 ILIM1_F Limit interrupt flag for channel 1. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.5 IMAT1_F Match interrupt flag for channel 1. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.6 ICAP1_F Capture interrupt flag for channel 1. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.7 - Reserved. -8 ILIM2_F Limit interrupt flag for channel 2. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.9 IMAT2_F Match interrupt flag for channel 2. 00 This interrupt source is not contributing to the MCPWMinterrupt request.1 If the corresponding bit in INTEN is 1, the MCPWM module isasserting its interrupt request to the Interrupt Controller.