NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 174 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 174 of 1269NXP Semiconductors UM10503Chapter 13: LPC43xx Reset Generation Unit (RGU)13.4.4.3 Reset external status register 2 for MASTER_RST13.4.4.4 Reset external status register 4 for WWDT_RST13.4.4.5 Reset external status register 5 for CREG_RST13.4.4.6 Reset external status registers for PERIPHERAL_RESETRefer to Table 113 for reset generators which have the PERIPH_RST output as resetsource.Table 124. Reset external status register 2 (RESET_EXT_STAT2, address 0x4005 3408) bitdescriptionBit Symbol Description ResetvalueAccess1:0 - Reserved. Do not modify; read as logic 0. 0 -2 PERIPHERAL_RESET Reset activated by PERIPHERAL_RSToutput. Write 0 to clear.0 = Reset not activated1 = Reset activated0 R/W31:3 - Reserved. Do not modify; read as logic 0. 0 -Table 125. Reset external status register 4 (RESET_EXT_STAT4, address 0x4005 3410) bitdescriptionBit Symbol Description ResetvalueAccess0 - Reserved. Do not modify; read as logic 0. 0 -1 CORE_RESET Reset activated by CORE_RST output. Write0 to clear.0 = Reset not activated1 = Reset activated0 R/W31:2 - Reserved. Do not modify; read as logic 0. 0 -Table 126. Reset external status register 5 (RESET_EXT_STAT5, address 0x4005 3414) bitdescriptionBit Symbol Description ResetvalueAccess0 - Reserved. Do not modify; read as logic 0. 0 -1 CORE_RESET Reset activated by CORE_RST output. Write0 to clear.0 = Reset not activated1 = Reset activated0 R/W31:2 - Reserved. Do not modify; read as logic 0. 0 -