NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 1198 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1198 of 126947.1 How to read this chapterThe EEPROM is available on parts LPC4357/53.47.2 Basic configurationThe EEPROM is configured using the following registers:• See Table 1065 for clocking and power control.• The EEPROM is reset by the EEPROM_RST (reset # 27).• The EEPROM interrupt is ORed with the interrupts from flash banks A and B andconnected to interrupt slot #4 in the NVIC.47.3 Features• 16384 byte EEPROM• Access via memory on the AHB bus• Less than 3 ms erase / program time• Endurance of > 100k erase / program cycles47.4 General descriptionThe EEPROM can be read and written/erased. A write operation involves two steps. Thefirst step is writing a minimum of 1 word (4 bytes) to a maximum of 32 words (128 bytes)to the desired page in the 16 KB EEPROM address space at address 0x2004 0000. Steptwo is an erase/program of that page into non-volatile memory. There are 128 pageswithin the 16 KB EEPROM address space. The last page is not writable. Note that datawritten to a page cannot be read back from the page address until the data have beenprogrammed into non-volatile memory.UM10503Chapter 47: LPC43xx EEPROM memoryRev. 1.3 — 6 July 2012 User manualTable 1065.EEPROM clocking and power controlBase clock Branch clock Operating frequencyEEPROM BASE_M4_CLK CLK_M4_EEPROM up to 204 MHz