NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 339 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 339 of 1269NXP Semiconductors UM10503Chapter 17: LPC43xx GPIO17.5.1.8 Pin interrupt rising edge registerThis register contains ones for pin interrupts selected in the PINTSELn registers (seeTable 145 and Table 146) on which a rising edge has been detected. Writing ones to thisregister clears rising edge detection. Ones in this register assert an interrupt request forpins that are enabled for rising-edge interrupts. All edges are detected for all pins selectedby the PINTSELn registers, regardless of whether they are interrupt-enabled.17.5.1.9 Pin interrupt falling edge registerThis register contains ones for pin interrupts selected in the PINTSELn registers (seeTable 145 and Table 146) on which a falling edge has been detected. Writing ones to thisregister clears falling edge detection. Ones in this register assert an interrupt request forpins that are enabled for falling-edge interrupts. All edges are detected for all pinsselected by the PINTSELn registers, regardless of whether they are interrupt-enabled.Table 192. Pin interrupt active level (falling edge) interrupt clear register (CIENF, address0x4008 7018) bit descriptionBit Symbol Description ResetvalueAccess7:0 CENAF Ones written to this address clears bits in the IENF, thusdisabling interrupts. Bit n clears bit n in the IENF register.0 = No operation.1 = LOW-active interrupt selected or falling edge interruptdisabled.NA WO31:8 - Reserved. - -Table 193. Pin interrupt rising edge register (RISE, address 0x4008 701C) bit descriptionBit Symbol Description ResetvalueAccess7:0 RDET Rising edge detect. Bit n detects the rising edge of the pinselected in PINTSELn.Read 0: No rising edge has been detected on this pin sinceReset or the last time a one was written to this bit.Write 0: no operation.Read 1: a rising edge has been detected since Reset or thelast time a one was written to this bit.Write 1: clear rising edge detection for this pin.0 R/W31:8 - Reserved. - -Table 194. Pin interrupt falling edge register (FALL, address 0x4008 7020) bit descriptionBit Symbol Description ResetvalueAccess7:0 FDET Falling edge detect. Bit n detects the falling edge of the pinselected in PINTSELn.Read 0: No falling edge has been detected on this pin sinceReset or the last time a one was written to this bit.Write 0: no operation.Read 1: a falling edge has been detected since Reset or thelast time a one was written to this bit.Write 1: clear falling edge detection for this pin.0 R/W31:8 - Reserved. - -