NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 189 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 189 of 1269NXP Semiconductors UM10503Chapter 14: LPC43xx Pin configurationP3_4 A15 C14 B8 171 119 [3] N;PUI/O GPIO1[14] — General purpose digital input/output pin.- R — Function reserved.- R — Function reserved.I/O SPIFI_SIO3 — I/O lane 3 for SPIFI.O U1_TXD — Transmitter output for UART 1.I/O I2S0_TX_WS — Transmit Word Select. It is driven by themaster and received by the slave. Corresponds to thesignal WS in the I 2S-bus specification.I/O I2S1_RX_SDA — I2S1 Receive data. It is driven by thetransmitter and read by the receiver. Corresponds to thesignal SD in the I2 S-bus specification.O LCD_VD13 — LCD data.P3_5 C12 C11 B7 173 121 [3] N;PUI/O GPIO1[15] — General purpose digital input/output pin.- R — Function reserved.- R — Function reserved.I/O SPIFI_SIO2 — I/O lane 2 for SPIFI.I U1_RXD — Receiver input for UART 1.I/O I2S0_TX_SDA — I2S transmit data. It is driven by thetransmitter and read by the receiver. Corresponds to thesignal SD in the I2 S-bus specification.I/O I2S1_RX_WS — Receive Word Select. It is driven by themaster and received by the slave. Corresponds to thesignal WS in the I 2S-bus specification.O LCD_VD12 — LCD data.P3_6 B13 B12 C7 174 122 [3] N;PUI/O GPIO0[6] — General purpose digital input/output pin.I/O SPI_MISO — Master In Slave Out for SPI.I/O SSP0_SSEL — Slave Select for SSP0.I/O SPIFI_MISO — Input 1 in SPIFI quad mode; SPIFI outputIO1.- R — Function reserved.I/O SSP0_MISO — Master In Slave Out for SSP0.- R — Function reserved.- R — Function reserved.Table 129. Pin description …continuedLCD, Ethernet, USB0, and USB1 functions are not available on all parts.SymbolLBGA256TFBGA180TFBGA100LQFP208[1]LQFP144Reset state[2]TypeDescription