NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 682 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 682 of 1269NXP Semiconductors UM10503Chapter 26: LPC43xx Ethernet26.6 Register descriptionTable 531. Register overview: Ethernet MAC and DMA (base address 0x4001 0000)Name Access AddressoffsetDescription Reset value ReferenceMAC_CONFIG R/W 0x0000 MAC configuration register 0x0000 8000 Table 532MAC_FRAME_FILTER R/W 0x0004 MAC frame filter 0x0000 0000 Table 533MAC_HASHTABLE_HIGH R/W 0x0008 Hash table high register 0x0000 0000 Table 534MAC_HASHTABLE_LOW R/W 0x000C Hash table low register 0x0000 0000 Table 535MAC_MII_ADDR R/W 0x0010 MII address register 0x0000 0000 Table 536MAC_MII_DATA R/W 0x0014 MII data register 0x0000 0000 Table 538MAC_FLOW_CTRL R/W 0x0018 Flow control register 0x0000 0000 Table 539MAC_VLAN_TAG R/W 0x001C VLAN tag register 0x0000 0000 Table 540- - 0x0020 Reserved - -MAC_DEBUG RO 0x0024 Debug register 0x0000 0000 Table 541MAC_RWAKE_FRFLT R/W 0x0028 Remote wake-up frame filter 0x0000 0000 Table 542MAC_PMT_CTRL_STAT R/W 0x002C PMT control and status 0x0000 0000 Table 543- - 0x0030 -0x0034Reserved - -MAC_INTR RO 0x0038 Interrupt status register 0x0000 0000 Table 544MAC_INTR_MASK R/W 0x003C Interrupt mask register 0x0000 0000 Table 545MAC_ADDR0_HIGH R/W 0x0040 MAC address 0 high register 0x8000 FFFF Table 546MAC_ADDR0_LOW R/W 0x0044 MAC address 0 low register 0xFFFF FFFF Table 547- - 0x0048 -0x06FCReserved - -MAC_TIMESTP_CTRL R/W 0x0700 Time stamp control register 0x0000 2000 Table 548SUBSECOND_INCR R/W 0x0704 Sub-second incrementregister0x0000 0000 Table 550SECONDS RO 0x0708 System time secondsregister0x0000 0000 Table 551NANOSECONDS RO 0x070C System time nanosecondsregister0x0000 0000 Table 552SECONDSUPDATE R/W 0x0710 System time secondsupdate register0x0000 0000 Table 553NANOSECONDSUPDATE R/W 0x0714 System time nanosecondsupdate register0x0000 0000 Table 554ADDEND R/W 0x0718 Time stamp addend register 0x0000 0000 Table 555TARGETSECONDS R/W 0x071C Target time seconds register 0x0000 0000 Table 556TARGETNANOSECONDS R/W 0x0720 Target time nanosecondsregister0x0000 0000 Table 557HIGHWORD R/W 0x0724 System time higher wordseconds register0x0000 0000 Table 558TIMESTAMPSTAT RO 0x0728 Time stamp status register 0x0000 0000 Table 559- 0x072C -0x0FFCReserved -DMA_BUS_MODE R/W 0x1000 Bus Mode Register 0x0002 0100 Table 560