UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1220 of 1269NXP Semiconductors UM10503Chapter 49: LPC43xx ARM Cortex M0/M4 reference49.3 Cortex-M0 instruction set summaryTable 1085.Cortex M0- instruction set summaryOperation Description Assembler CyclesMove 8-bit immediate MOVS Rd, # 1Lo to Lo MOVS Rd, Rm 1Any to Any MOV Rd, Rm 1Any to PC MOV PC, Rm 3Add 3-bit immediate ADDS Rd, Rn, # 1All registers Lo ADDS Rd, Rn, Rm 1Any to Any ADD Rd, Rd, Rm 1Any to PC ADD PC, PC, Rm 38-bit immediate ADDS Rd, Rd, # 1With carry ADCS Rd, Rd, Rm 1Immediate to SP ADD SP, SP, # 1From address from SP ADD Rd, SP, # 1From address from PC ADR Rd, 1Subtract Lo and Lo SUBS Rd, Rn, Rm 13-bit immediate SUBS Rd, Rn, # 18-bit immediate SUBS Rd, Rd, # 1With carry SBCS Rd, Rd, Rm 1Immediate from SP SUB SP, SP, # 1Negate RSBS Rd, Rn, #0 1Multiply Multiply MULS Rd, Rm, Rd 32Compare Compare CMP Rn, Rm 1Negative CMN Rn, Rm 1Immediate CMP Rn, # 1Logical AND ANDS Rd, Rd, Rm 1Exclusive OR EORS Rd, Rd, Rm 1OR ORRS Rd, Rd, Rm 1Bit clear BICS Rd, Rd, Rm 1Move NOT MVNS Rd, Rm 1AND test TST Rn, Rm 1Shift Logical shift left by immediate LSLS Rd, Rm, # 1Logical shift left by register LSLS Rd, Rd, Rs 1Logical shift right by immediate LSRS Rd, Rm, # 1Logical shift right by register LSRS Rd, Rd, Rs 1Arithmetic shift right ASRS Rd, Rm, # 1Arithmetic shift right by register ASRS Rd, Rd, Rs 1Rotate Rotate right by register RORS Rd, Rd, Rs 1