NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 299 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 299 of 1269NXP Semiconductors UM10503Chapter 15: LPC43xx System Control Unit (SCU)/ IO configuration15.4.8 Analog function select registerFor pins which have digital and analog functions, this register selects the analog DAC andband gap function over any of the possible digital functions.In addition, the DAC function is pinned out on a dedicated analog pin which is not affectedby this register.The following pins are controlled by the ENAIO2 register:By default, all pins are connected to their digital function 0 and only the digital pad isavailable.To select the analog function, the pad must be set as follows using the correspondingSFSP register:1 ADC1_1 Select ADC1_1 0 R/W0 Digital function selected on pin PC_0.1 Analog function ADC1_1 selected on pin PC_0.2 ADC1_2 Select ADC1_2 0 R/W0 Digital function selected on pin PF_9.1 Analog function ADC1_2 selected on pin PF_9.3 ADC1_3 Select ADC1_3 0 R/W0 Digital function selected on pin PF_6.1 Analog function ADC1_3 selected on pin PF_6.4 ADC1_4 Select ADC1_4 0 R/W0 Digital function selected on pin PF_5.1 Analog function ADC1_4 selected on pin PF_5.5 ADC1_5 Select ADC1_5 0 R/W0 Digital function selected on pin PF_11.1 Analog function ADC1_5 selected on pin PF_11.6 ADC1_6 Select ADC1_6 0 R/W0 Digital function selected on pin P7_7.1 Analog function ADC1_6 selected on pin P7_7.7 ADC1_7 Select ADC1_7. 0 R/W0 Digital function selected on pin PF_7.1 Analog function ADC1_7 selected on pin PF_7.31:8 Reserved - -Table 141. ADC1 function select register (ENAIO1, address 0x4008 6C8C) bit descriptionBit Symbol Value Description ResetvalueAccessTable 142. Pins controlled by the ENAIO2 registerPin ADC function ENAIO2 register bitP4_4 DAC 0PF_7 BG (band gap output) 4