NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 804 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 804 of 1269NXP Semiconductors UM10503Chapter 27: LPC43xx LCD27.9 LCD panel signal usage(1) Polarities may vary for some displays.Fig 86. Vertical timing for TFT displaysLCD_TIMV (VSW)LCDENA(data enable)LCD_TIMV (VBP) LCD_TIMV(LPP) LCD_TIMV (VFP)LCDFP(vertical synchpulse)back porch(defined in line clocks) front porch(defined in line clocks)pixel dataand horizontalcontrol signalsfor one frameone frameall horizontal lines for one framesee horizontal timing for TFT displaysdata enableLCDDCLK(panel clock) panel data clock activeTable 641. LCD panel connections for STN single panel modeExternal pin 4-bit mono STN single panel 8-bit mono STN single panel Color STN single panelLPC43xx pinusedLCD function LPC43xx pinusedLCD function LPC43xx pinusedLCD functionLCDVD23 - - - - - -LCDVD22 - - - - - -LCDVD21 - - - - - -LCDVD20 - - - - - -LCDVD19 - - - - - -LCDVD18 - - - - - -LCDVD17 - - - - - -LCDVD16 - - - - - -LCDVD15 - - - - - -LCDVD14 - - - - - -LCDVD13 - - - - - -LCDVD12 - - - - - -LCDVD11 - - - - - -LCDVD10 - - - - - -LCDVD9 - - - - - -