NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 312 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 312 of 1269NXP Semiconductors UM10503Chapter 16: LPC43xx Global Input Multiplexer Array (GIMA)16.4.4 Timer 0 CAP0_3 capture input multiplexer (CAP0_3_IN)16.4.5 Timer 1 CAP1_0 capture input multiplexer (CAP1_0_IN)7:4 SELECT Select input. Values 0x3 to 0xF are reserved. 00x0 CTIN_20x1 SGPIO3_DIV0x2 T0_CAP231:8 - Reserved -Table 152. Timer 0 CAP0_2 capture input multiplexer (CAP0_2_IN, address 0x400C 7008) bitdescriptionBit Symbol Value Description ResetvalueTable 153. Timer 0 CAP0_3 capture input multiplexer (CAP0_3_IN, address 0x400C 700C) bitdescriptionBit Symbol Value Description Resetvalue0 INV Invert input 00 Not inverted.1 Input inverted.1 EDGE Enable rising edge detection 00 No edge detection.1 Rising edge detection enabled.2 SYNCH Enable synchronization 00 Disable synchronization.1 Enable synchronization.3 PULSE Enable single pulse generation. 00 Disable single pulse generation.1 Enable single pulse generation.7:4 SELECT Select input. Values 0x3 to 0xF are reserved. 00x0 CTOUT_15 or T3_MAT30x1 T0_CAP30x2 T3_MAT331:8 - Reserved -Table 154. Timer 1 CAP1_0 capture input multiplexer (CAP1_0_IN, address 0x400C 7010) bitdescriptionBit Symbol Value Description Resetvalue0 INV Invert input 00 Not inverted.1 Input inverted.1 EDGE Enable rising edge detection 00 No edge detection.1 Rising edge detection enabled.