UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 957 of 1269NXP Semiconductors UM10503Chapter 37: LPC43xx USART0_2_3[1] Values 0000, 0011, 010, 0111, 1000, 1001, 1010, 1011,1101, 1110,1111 are reserved.[2] For details see Section 37.6.8 “USART Line Status Register”[3] For details see Section 37.6.1 “USART Receiver Buffer Register”[4] For details see Section 37.6.5 “USART Interrupt Identification Register” and Section 37.6.2 “USARTTransmitter Holding Register”The USART THRE interrupt (IIR[3:1] = 001) is a third level interrupt and is activated whenthe USART THR FIFO is empty provided certain initialization conditions have been met.These initialization conditions are intended to give the USART THR FIFO a chance to fillup with data to eliminate many THRE interrupts from occurring at system start-up. Theinitialization conditions implement a one character delay minus the stop bit wheneverTHRE = 1 and there have not been at least two characters in the THR at one time sincethe last THRE = 1 event. This delay is provided to give the CPU time to write data to THRwithout a THRE interrupt to decode and service. A THRE interrupt is set immediately if theUSART THR FIFO has held two or more characters at one time and currently, the THR isempty. The THRE interrupt is reset when a THR write occurs or a read of the IIR occursand the THRE is the highest interrupt (IIR[3:1] = 001).37.6.6 USART FIFO Control RegisterThe FCR controls the operation of the USART RX and TX FIFOs.0100 Second RX DataAvailableRx data available or trigger level reached inFIFO (FCR0=1)RBRRead[3] orUSARTFIFO dropsbelowtrigger level1100 Second CharacterTime-outindicationMinimum of one character in the RX FIFO andno character input or removed during a timeperiod depending on how many characters arein FIFO and what the trigger level is set at (3.5 to4.5 character times).The exact time will be:[(word length) 7 - 2] 8 + [(trigger level -number of characters) 8 + 1] RCLKsRBRRead[3]0010 Third THRE THRE [2] IIR Read[4](if source ofinterrupt) orTHR writeTable 828. USART Interrupt HandlingIIR[3:0]value[1]Priority InterrupttypeInterrupt source Interruptreset