NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 943 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 943 of 1269NXP Semiconductors UM10503Chapter 36: LPC43xx Event monitor/recorder36.7.1 Event Monitor/Recorder Control RegisterThe Event Monitor/Recorder Control Register allows setup of the Event Monitor/Recorderand individual control over aspects of each channel’s operation.Table 814. Event Monitor/Recorder Control Register (ERCONTROL - address 0x4004 6084) bit descriptionBit Symbol Value Description Resetvalue0 INTWAKE_EN0 Interrupt and wakeup enable for channel 0. 00 No interrupt or wakeup will be generated by event channel 0.1 An event in channel 0 will trigger an (RTC) interrupt and a wake-up request.1 GPCLEAR_EN0 Enables automatically clearing the RTC general purpose registers when an eventoccurs on channel 0.00 Channel 0 has no influence on the general purpose registers.1 An event in channel 0 will clear the general purpose registers asynchronously.2 POL0 Selects the polarity of an event on input pin WAKEUP0. 00 A channel 0 event is defined as a negative edge on WAKEUP0.1 A channel 0 event is defined as a positive edge on WAKEUP0.3 EV0_INPUT_EN Event enable control for channel 0. Event Inputs should remain DISABLED whennot being used for event detection, particularly if the associated pin is being usedfor some other function.00 Event 0 input is disabled and forced high internally.1 Event 0 input is enabled.9:4 - Reserved. Read value is undefined, only zero should be written. NA10 INTWAKE_EN1 Interrupt and wakeup enable for channel 1. 00 No interrupt or wakeup will be generated by event channel 1.1 An event in channel 1 will trigger an (RTC) interrupt and a wake-up request.11 GPCLEAR_EN1 Enables automatically clearing the RTC general purpose registers when an eventoccurs on channel 1.00 Channel 1 has no influence on the general purpose registers.1 A n event in channel 1 will clear the general purpose registers asynchronously.12 POL1 Selects the polarity of an event on input pin WAKEUP1. 00 A channel 1 event is defined as a negative edge on WAKEUP1.1 A channel 1 event is defined as a positive edge on WAKEUP1.13 EV1_INPUT_EN Event enable control for channel 1. Event Inputs should remain DISABLED whennot being used for event detection, particularly if the associated pin is being usedfor some other function.00 Event 1 input is disabled and forced high internally.1 Event 1 input is enabled.19:14 - Reserved. Read value is undefined, only zero should be written. NA20 INTWAKE_EN2 Interrupt and wakeup enable for channel 2.0 No interrupt or wakeup will be generated by event channel 2.1 An event in channel 2 will trigger an (RTC) interrupt and a wake-up request.