NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 1194 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1194 of 1269NXP Semiconductors UM10503Chapter 46: LPC43xx flash programming/ISP and IAP46.10 JTAG flash programming interfaceDebug tools can write parts of the flash image to the RAM and then execute the IAP call"Copy RAM to Flash" repeatedly with proper offset.46.11 Flash signature generationThe flash module contains a built-in signature generator. This generator can produce a128-bit signature from a range of flash memory. A typical usage is to verify the flashedcontents against a calculated signature (e.g. during programming).The address range for generating a signature must be aligned on flash-word boundaries,i.e. 128-bit boundaries. Once started, signature generation completes independently.While signature generation is in progress, the flash memory cannot be accessed for otherpurposes, and an attempted read will cause a wait state to be asserted until signaturegeneration is complete. Code outside of the flash (e.g. internal RAM) can be executedduring signature generation. This can include interrupt services, if the interrupt vectortable is re-mapped to memory other than the flash memory. The code that initiatessignature generation should also be placed outside of the flash memory.46.11.1 Register description for signature generation0x0000 0012 INVALID_STOP_BIT Invalid stop bit setting.0x0000 0013 CODE_READ_PROTECTION_ENABLEDCode read protection enabled.0x0000 0014 INVALID_FLASH_UNIT Invalid flash unit.0x0000 0015 USER_CODE_CHECKSUM0x0000 0016 ERROR_SETTING_ACTIVE_PARTITIONTable 1055.ISP Return Codes SummaryReturn Code Mnemonic DescriptionTable 1056.Register overview: FMC controller for flash bank A/B (base address 0x4000 C000 (flash bank A) and0x4000 D000 (flash bank B))Name Access Address offset Description ResetValueReferenceFMSSTART R/W 0x020 Signature start address register 0 Table 1057FMSSTOP R/W 0x024 Signature stop-address register 0 Table 1058FMSW0 R 0x02C 128-bit signature Word 0 - Table 1059FMSW1 R 0x030 128-bit signature Word 1 - Table 1060FMSW2 R 0x034 128-bit signature Word 2 - Table 1061FMSW3 R 0x038 128-bit signature Word 3 - Table 1062FMSTAT R 0xFE0 Signature generation status register 0 Table 1063FMSTATCLR W 0xFE8 Signature generation status clear register - Table 1064