UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 206 of 1269NXP Semiconductors UM10503Chapter 14: LPC43xx Pin configurationP9_6 L11 M9 - 103 72 [3] N;PUI/O GPIO4[11] — General purpose digital input/output pin.O MCOB1 — Motor control PWM channel 1, output B.I USB1_PWR_FAULT — USB1 Port power fault signalindicating over-current condition; this signal monitorsover-current on the USB1 bus (external circuitry requiredto detect over-current condition).- R — Function reserved.- R — Function reserved.I ENET_COL — Ethernet Collision detect (MII interface).I/O SGPIO8 — General purpose digital input/output pin.I U0_RXD — Receiver input for USART0.PA_0 L12 L10 - 126 - [3] N;PU- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.O I2S1_RX_MCLK — I2S1 receive master clock.O CGU_OUT1 — CGU spare clock output 1.- R — Function reserved.PA_1 J14 H12 - 134 - [4] N;PUI/O GPIO4[8] — General purpose digital input/output pin.I QEI_IDX — Quadrature Encoder Interface INDEX input.- R — Function reserved.O U2_TXD — Transmitter output for USART2.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.PA_2 K15 J13 - 136 - [4] N;PUI/O GPIO4[9] — General purpose digital input/output pin.I QEI_PHB — Quadrature Encoder Interface PHB input.- R — Function reserved.I U2_RXD — Receiver input for USART2.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.Table 129. Pin description …continuedLCD, Ethernet, USB0, and USB1 functions are not available on all parts.SymbolLBGA256TFBGA180TFBGA100LQFP208[1]LQFP144Reset state[2]TypeDescription