UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 207 of 1269NXP Semiconductors UM10503Chapter 14: LPC43xx Pin configurationPA_3 H11 E10 - 147 - [4] N;PUI/O GPIO4[10] — General purpose digital input/output pin.I QEI_PHA — Quadrature Encoder Interface PHA input.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.PA_4 G13 E12 - 151 - [3] N;PU- R — Function reserved.O CTOUT_9 — SCT output 9. Match output 3 of timer 3.- R — Function reserved.I/O EMC_A23 — External memory address line 23.I/O GPIO5[19] — General purpose digital input/output pin.- R — Function reserved.- R — Function reserved.- R — Function reserved.PB_0 B15 D14 - 164 - [3] N;PU- R — Function reserved.O CTOUT_10 — SCT output 10. Match output 3 of timer 3.O LCD_VD23 — LCD data.- R — Function reserved.I/O GPIO5[20] — General purpose digital input/output pin.- R — Function reserved.- R — Function reserved.- R — Function reserved.PB_1 A14 A13 - 175 - [3] N;PU- R — Function reserved.I USB1_ULPI_DIR — ULPI link DIR signal. Controls theULP data line direction.O LCD_VD22 — LCD data.- R — Function reserved.I/O GPIO5[21] — General purpose digital input/output pin.O CTOUT_6 — SCT output 6. Match output 2 of timer 1.- R — Function reserved.- R — Function reserved.Table 129. Pin description …continuedLCD, Ethernet, USB0, and USB1 functions are not available on all parts.SymbolLBGA256TFBGA180TFBGA100LQFP208[1]LQFP144Reset state[2]TypeDescription