UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 168 of 1269NXP Semiconductors UM10503Chapter 13: LPC43xx Reset Generation Unit (RGU)13.4.3 RGU reset active status registerThe reset active status register shows the current value of the reset outputs of the RGU.Note that the resets are active LOW.17:16 M0APP_RST Status of the M0APP_RST reset generator output00 = No reset activated01 = Reset output activated by input to the reset generator10 = Reserved11 = Reset output activated by software write to RESET_CTRL register11 R/W19:18 SGPIO_RST Status of the SGPIO_RST reset generator output00 = No reset activated01 = Reset output activated by input to the reset generator10 = Reserved11 = Reset output activated by software write to RESET_CTRL register01 R/W21:20 SPI_RST Status of the SPI_RST reset generator output00 = No reset activated01 = Reset output activated by input to the reset generator10 = Reserved11 = Reset output activated by software write to RESET_CTRL register01 R/W23:22 - Reserved 01 -25:24 - Reserved 01 -27:26 - Reserved 01 -29:28 - Reserved 01 -31:30 - Reserved 01 -Table 119. Reset status register 3 (RESET_STATUS3, address 0x4005 311C) bit description…continuedBit Symbol Description ResetvalueAccessTable 120. Reset active status register 0 (RESET_ACTIVE_STATUS0, address 0x4005 3150)bit descriptionBit Symbol Description ResetvalueAccess0 CORE_RST Current status of the CORE_RST0 = Reset asserted1 = No reset0 R1 PERIPH_RST Current status of the PERIPH_RST0 = Reset asserted1 = No reset0 R2 MASTER_RST Current status of the MASTER_RST0 = Reset asserted1 = No reset0 R3 - Reserved 04 WWDT_RST Current status of the WWDT_RS0 = Reset asserted1 = No reset0 R